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作者:李侑娟
作者(英文):You-Jiuan Li
論文名稱:使用雙耦合回授或被動混合B/C類技術之低相位雜訊壓控振盪器設計
論文名稱(英文):Design of Low Phase Noise Voltage-Controlled Oscillators Using Dual-Coupling Feedback Method or Passive Hybrid ClassB/C Technology
指導教授:翁若敏
指導教授(英文):Ro-Min Weng
口試委員:彭盛裕
蕭志龍
口試委員(英文):Sheng-Yu Peng
Chih-Lung Hsiao
學位類別:碩士
校院名稱:國立東華大學
系所名稱:電機工程學系
學號:610423012
出版年(民國):106
畢業學年度:106
語文別:英文
論文頁數:83
關鍵詞:壓控振盪器四相位雙推式
關鍵詞(英文):VCOQVCOPush-Push
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近年無線通訊產品發展迅速,為了符合日常所需,電子行動裝置講求低功耗、低成本和體積小等等性能。然而,欲求上述功能皆呈現在產品中是困難的,必須從中做取捨,使產品在所需範圍內達到最佳效能。在射頻電路中壓控振盪器的功用是提供本地振盪訊號給混頻器做升降頻,因此如何提供純淨的訊號源是此設計的重點。晶片模擬驗證及佈局均採用台灣積體電路製造公司(tsmc) 0.18 μm 1P6M CMOS 製程技術。本論文所提出的第一顆晶片是低相位誤差低相位雜訊四相位壓控振盪器,電路應用在X頻帶之雷達系統。電路架構採用底部串聯式四相位壓控振盪器,讓電路有良好的相位雜訊,並使用雙耦合回授技術改良輸出相位的精準度。在距離載波頻率1 MHz處的相位雜訊是-111.03 dBc/Hz。相位誤差是0.54至1.65度。本論文所提出的第二顆晶片是低相位雜訊雙頻帶之壓控振盪器,主要應用在24 GHz車用先進駕駛輔助系統或二次降頻的混頻器上。電路採用雙推式架構能同時輸出基頻訊號和倍頻訊號,使用混合類別B/C技術取代傳統可變電容,提高整體電路的品質因子達到低相位雜訊的目的。在距離載波頻率24 GHz 和48 GHz時1 MHz處的相位雜訊分別是-106.8和-109.1 dBc/Hz。
Over the past few years, wireless communication products are developing rapidly. Electronic mobile devices require performance such as low power, low cost and small size, etc. However, it is difficult to implement all the conditions, the trade-offs must be made to optimize the product. In the RF circuit, voltage controlled oscillator (VCO) output local oscillator signal is supplied to mixer for up or down-conversion. Therefore, how to provide a stable and pure signal is the point of VCO design. The circuit simulation and layout are used in Taiwan Semiconductor Manufacturing Company (tsmc) 0.18 μm 1P6M CMOS process technology. The first chip proposed in this thesis is a low phase error low phase noise quadrature voltage controlled oscillator (QVCO), which is applied in X-band radar system. Circuit structure adopted bottom series QVCO (BS-QVCO) with good phase noise. And then used dual coupling feedback technology to improve the phase output and accuracy. The phase noise is -111.03 dBc/Hz at 1 MHz offset from the central frequency, Phase error is 0.54° to 1.65°. The second chip proposed in this thesis is a low phase noise dual-band VCO, which is applied in 24 GHz Advanced Driver Assistance Systems (ADAS) or double down-conversion mixers. Circuit structure adopted push-push pair which can output fundamental frequency and second harmonic frequency at the same time. And then used passive hybrid Class-B/C technology to replace traditional varactor. Improve quality factor (Q-factor) to achieve low phase noise in the circuit. The phase noise are -106.8 and -109.1 dBc/Hz at 1 MHz offset from the central frequency 24 GHz and 48 GHz, respectively.
Acknowledgement I
Abstract (Chinese) II
Abstract (English) III
Contents IV
List of Figures VII
List of Tables X
Chapter 1 Introduction 1
1.1 Research Background 1
1.2 Radar System Applications 2
1.2.1 X-band 2
1.2.2 ADAS-FMCW 2
1.3 Thesis Organization 3
Chapter 2 Basics Theory of Voltage Controlled Oscillator 5
2.1 Oscillators Theory 5
2.1.1 Ring Oscillator 6
2.1.2 LC-Tank Oscillator 7
2.1.3 Traditional LC-Tank VCO 10
2.1.4 Traditional Quadrature LC-Tank VCO 11
2.2 Quality Factor 13
2.3 Parameters of VCO 15
2.4 Phase Noise 18
2.4.1 Definition of Phase Noise 18
2.4.2 Effect of phase noise to the communication system 20
2.4.3 Phase noise analysis - Thermal Noise 21
2.4.4 Phase noise analysis - Flicker Noise 24
2.4.5 Phase noise analysis - Shot Noise 28
2.5 Review of Paper 29
2.5.1 A Low Phase Noise Quadrature LC VCO Using Capacitive Common-Source Coupling [15] 29
2.5.2 A V-Band Push-Push VCO with Wide Tuning Range Using 0.18μm CMOS Process [16] 30
Chapter 3 Design and Measurement of the QVCO 31
3.1 Design a Low Phase Error Low Phase Noise QVCO 31
3.1.1 Circuit Architecture and Design 31
3.1.2 Simulation environment 36
3.1.3 Component selection 36
3.1.4 Buffer Circuit 37
3.1.5 Simulation Results 38
3.2 Circuit Layout and Measurement 43
3.2.1 Process of VCO design 43
3.2.2 Circuit Layout and Consideration 44
3.2.3 Measurement Results and Discussion 46
Chapter 4 Design and Measurement of the Push-Push VCO 51
4.1 Design a Low Phase Noise Push-Push VCO 51
4.1.1 Circuit Architecture and Design 52
4.1.2 Component selection 55
4.1.3 Simulation Results 57
4.2 Circuit Layout and Measurement 63
4.2.1 Circuit Layout and Consideration 63
4.2.2 Measurement Results and Discussion 65
Chapter 5 Conclusion and Future Work 67
5.1 Conclusion 67
5.2 Future Work 67
References 69
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