本論文主要針對「應用於無線通訊系統之低成本高性能接收機前端電路設計」進行研究探討、設計與製作，共提出兩顆分別應用於ZigBee系統和車用雷達系統的電路設計，並使用台灣半導體研究中心所提供tsmc 0.18m 1P6M CMOS製程模擬及實作，晶片採用on-wafer方式測量。
第一顆為「應用於ZigBee系統2.4GHz之低電壓低雜訊放大器設計」，此電路使用疊接架構，在不增加電源消耗的情況下提高增益，並使用基體偏壓技術，可以有效降低操作電壓，且可以透過調整 來優化整體增益和雜訊，其量測結果如下：操作電壓0.6V，總功率消耗為2.16mW，增益為19.2dB，雜訊指數為2.3dB，輸入三階截斷點為12dBm，輸入返回損耗與輸出返回損耗皆小於10dB，晶片面積為1.114×0.863mm2。
第二顆為「應用於車用雷達系統之低成本高性能接收機前端電路設計」，整合了低雜訊放大器和混頻器，使用電流注入技術來提高轉換增益，負載級採用共模回授架構取代傳統電阻式負載，在不影響線性度的情況下提高轉換增益，緩衝級則是採用跨阻放大器供量測使用，可以增加轉換增益並達到良好的輸出阻抗匹配。其模擬結果如下：操作電壓1.3V，總功率消耗為4.5mW，轉換增益26.8dB，雜訊指數為7.8dB，輸入三階截斷點為15dBm，輸入返回損耗與輸出返回損耗皆小於10dB，晶片面積為0.824×0.897 mm2。

The research, design and implementation of a low cost high performance front-end receiver for wireless communication system applications, is presented in this thesis. Two RF circuits were proposed for either ZigBee systems or vehicle radar systems, respectively. Both circuits were simulated and fabricated by using tsmc 0.18m 1P6M CMOS process technology provided by Taiwan Semiconductor Research Institute. The circuit performances were measured by an on-wafer method.
The first chip is a 2.4GHz low noise amplifier with low voltage for ZigBee systems. This circuit uses a stacked architecture to improve gain without increasing power consumption. Using the body-biased technology can effectively reduce the operating voltage and optimize the overall gain and noise by adjusting VBS. Under the supply voltage of 0.6V, the circuit performances are achieved with a gain of 19.2dB. The noise figure is 2.3dB. The IIP3 is -12dBm. The total power consumption is 2.16mW. The chip size is 1.114×0.863mm2
The second chip is a low cost and high performance receiver front-end for vehicle radar systems that both low noise amplifier and mixer were integrated together. The designed mixer is based on an architecture of a traditional single-balanced mixer. Current bleeding technology is used to increase the conversion gain. The load stage utilizes a common-mode feedback architecture instead of a traditional resistive load to improve the conversion gain without affecting the linearity. The buffer stage is a transimpedance amplifier for measurement, which increases conversion gain and achieves good output impedance matching. Under the supply voltage of 1.3V, the circuit performances are achieved with a conversion gain of 26.8dB. The noise figure is 7.8dB. The IIP3 is -15dBm. The total power consumption is 4.5mW. The chip size is 0.824×0.897mm2.

第一章 序論 1
第二章 射頻接收機前端介紹 9
第三章 應用於ZigBee系統2.4GHz之低電壓低雜訊放大器 29
第四章 應用於車用雷達系統之低成本高性能接收機前端電路設計 57
第五章 結論與未來方向 85

[1] R. Thakur, “Scanning LIDAR in Advanced Driver Assistance Systems and Beyond: Building a road map for next-generation LIDAR technology,” IEEE Consumer Electronics Society, vol. 5, no. 3, pp. 48 – 54, Jul. 2016.
[2] J. L. Yin, B. H. Chen, and K. R. Lai, “Automatic Dangerous Driving Intensity Analysis for Advanced Driver Assistance Systems from Multimodal Driving Signals,” IEEE Sensors Journal, pp. 1 – 10, Oct. 2017.
[3] C. M. Filho, M. H. Terra, and D. F. Wolf, “Safe Optimization of Highway Traffic With Robust Model Predictive Control-Based Cooperative Adaptive Cruise Control,” IEEE Transactions on Intelligent Transportation Systems, vol. 18, no. 11, pp. 3193 – 3203, May 2017.
[4] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, 2004.
[5] B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Companies, 2001.
[6] D. M. Pozar, Microwave Engineering, John Wiley & Sons Inc, 2004.
[7] Y. T. Chang, H. Y. Wu, and H. C. Lu, “A K-Band High-Gain Down-Converter Mixer Using,” IEEE European Microwave Integrated Circuits Conference (EuMIC), Oct. 2016.
[8] M. K. Ali, A. Hamidian, A. Malignaggi, “Low Flicker Noise High Linear Direct Conversion Mixer for K-Band Applications in a 90 nm CMOS Technology,” International Conference on Microwaves, Radar and Wireless Communications (MIKON), Jun. 2014.
[9] V. Subramanian, T. Zhang, and G. Boeck, “Low Noise 24 GHz CMOS Receiver for FMCW Based Wireless Local Positioning,” IEEE Microwave and Wireless Components Letters, vol. 21, no. 10, pp.553-55, Oct. 2011.
[10] D. Wu, R. Huang, and W. Wong, “A 0.4-V low noise amplifier using forward body bias technology for 5 GHz application,” IEEE Microwave and Wireless Components Letters. vol. 17, no. 7, pp. 543-545. Jul 2007.
[11] B. Razavi, RF Microelectronics, Prentice-Hall, 1997.
[12] R. Fiorelli, F. Silveira, and E. Peral´ıas, “MOST Moderate–Weak-Inversion Region as the Optimum Design Zone for CMOS 2.4-GHz CSLNAs” IEEE Transactions on Microwave Theory and Techniques, vol.62, no.3, pp.556-565, Mar. 2014.
[13] Y. J. Hong, S. F. Wang , and P. T. Chen, “A Concurrent Dual-Band 2.4/5.2 GHz Low-Noise Amplifier Using Gain Enhanced Techniques” 2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC), May 2015.
[14] G. B. Rao, “A high gain and high linear LNA for low power receiver front-end applications,” International Conference on Communication and Signal Processing (ICCSP), Apr. 2016
[15] 陳冠螢，應用於無線通訊系統之高增益低雜訊接收機前端設計，國立東華大學電機工程研究所碩士論文，民國一百零六年。
[16] S. G. Lee and J. K. Choi, “ Current-reuse bleeding mixer” Electronics Letters. vol. 36, no. 8, pp.696-697, Apr 2000.
[17] H. Kraimia, T. Taris, and J. B. Begueret, “A 2.4GHz ultra-low power current-reuse bleeding mixer with resistive feedback,” IEEE International Conference on Electronics, Circuits, and Systems, Dec. 2011.
[18] 林佑儒，應用於UWB或K band 無線通訊接收機之高線性度混頻器設計，國立東華大學電機工程研究所碩士論文，民國一百零三年。
[19] J. H. Cheng, C. L. Hsieh, and M. H. Wu, “A 0.33 V 683μW K-Band Transformer-Based Receiver Front-End in 65 nm CMOS Technology,” IEEE Microwave and Wireless Components Letters, vol. 25, no. 3, pp.184-186, Mar. 2015.
[20] J. Dang, B. Meinerzhagen, and S. Brückner, “A low noise figure K-band receiver in 130 nm CMOS,” German Microwave Conference (GeMiC), Mar. 2018.
[21] C. M. Li, M. T. Li, and K. C. He, “A Low-Power Self-Forward-Body-Bias CMOS LNA for 3–6.5-GHz UWB Receivers,” IEEE Microwave and Wireless Components Letters, vol. 20, no. 2, pp.100-102, Feb. 2010.
[22] N. Vitee, H. Ramiah and W. K. Chong “A Wideband CMOS LNA-Mixer for Cognitive Radio Receiver,” IEEE Asia Pacific Conference on Circuits and Systems Nov. 2014, pp. 348-351.
[23] M. K. Ali, A. Hamidian, and A. Malignaggi, “Low Flicker Noise High Linearity Direct Conversion Mixer for K-Band Applications in a 90 nm CMOS Technology,” International Conference on Microwaves, Radar and Wireless Communications, Jun. 2014.
[24] 魏宏哲，泛用於WiMax系統之寬頻混頻器的設計與分析，國立東華大學電機工程研究所博士論文，民國九十八年。
[25] J. Dang, B. Meinerzhagen, and S. Brückner, “A low noise figure K-band receiver in 130 nm CMOS,” German Microwave Conference Mar. 2018,pp.243-240
[26] J. Y. Lee, J. Y. Park, and T. Y. Yun, “Flicker Noise Improved CMOS Mixer Using Feedback Current Bleeding,” IEEE Microwave and Wireless Components Letters, vol. 27, no. 8, pp.730-732, Aug. 2017.
[27] M. Elmi, A. Aghajani, and M. J. Nokandi, “A wideband receiver front-end using active/passive N-path mixers,” Iranian Conference on Electrical Engineering (ICEE), Oct. 2016.
[28] H. K. Chiou, K. C. Lin, and W. H. Chen, “A 1-V 5-GHz Self-Bias Folded-Switch Mixer in 90-nm CMOS for WLAN Receiver” IEEE Transactions On Circuits And Systems vol. 59, no. 6, Jun. 2012.